AP7010 DATA CONVERTERS L T P C 3 0 0 3
OBJECTIVES:
- To study the A/D and D/A architectures
- To study the importance of sample and hold circuits in A/D and D/A conversion techniques.
UNIT I SAMPLE AND HOLD CIRCUITS 9
Sampling switches, Conventional open loop and closed loop sample and hold architecture, Open loop architecture with miller compensation, multiplexed input architectures, recycling architecture switched capacitor architecture.
UNIT II SWITCHED CAPACITOR CIRCUITS AND COMPARATORS 9
Switched-capacitor amplifiers, switched capacitor integrator, switched capacitor common mode feedback. Single stage amplifier as comparator, cascaded amplifier stages as comparator, latched comparators.
UNIT III DIGITAL TO ANALOG CONVERSION 9
Performance metrics, reference multiplication and division, switching and logic functions in DAC, Resistor ladder DAC architecture, current steering DAC architecture.
UNIT IV ANALOG TO DIGITAL CONVERSION 9
Performance metric, Flash architecture, Pipelined Architecture, Successive approximation architecture, Time interleaved architecture.
UNIT V PRECISION TECHNIQUES 9
Comparator offset cancellation, Op Amp offset cancellation, Calibration techniques, range overlap and digital correction.
TOTAL: 45PERIODS
REFERENCE:
- Behzad Razavi, “Principles of data conversion system design”, S. Chand and company Ltd, 2000.
